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SemiAI

SMILE Lite

Unify analysis, sampling, and modeling into one workbench to accelerate HVM decisions.

The Challenge
  • BI, sampling, and modeling live in separate tools — the analysis flow gets fragmented.
  • The trade-off between measurement throughput and model accuracy depends on manual judgment.
Our Approach
  • Semiconductor-native visualizations and selection chains close the analysis loop on one screen.
  • Four-step sampling — Layout → Key → Optimization → Wafer Map — automated end to end.
  • Inter-field · Intra-field · CPE decomposition lets engineers assemble overlay recipes directly.

AS-IS

Fragmented tools

Manual sampling

Single-stage models

Limited feedback

SMILE Lite

BI

  • Semiconductor-native visualizations
  • Chart-chain analysis

Sampling

  • 4-step auto optimization
  • Reflected to metrology recipes

Modeling

  • Inter · Intra · CPE decomposition
  • Recipe + Simulation
  • Faster analysis cycles
  • Reduced metrology time
  • Improved overlay correction precision
  • Pre-HVM simulation

TO-BE

Unified analysis workbench

Optimized metrology sampling

Multi-stage correction model

Equipment Feedback · HVM Deployment

SMILE Lite BI Dashboard — Trend, Box Plot, Wafer Map, and Vector Map composed on a single analysis dashboardSMILE Lite BI Dashboard — chart-to-chart navigation visualized as a Flow GraphSMILE Lite BI Dashboard — Wafer / Vector / Heatmap / 3D views comparing cycle-to-cycle differences

BI Dashboard — Analysis closed in one view

  • Compose 11 semiconductor-domain charts — Trend · Box Plot · Wafer / Vector Map · Linear Regression — on a single dashboard
  • Brush · Ctrl+Click · Union selections feed forward as the input of the next chart (selection chain)
  • Bookmark data selection · chart layout · time range together, and visualize the analysis flow as a Flow Graph
SMILE Lite Sampling Optimizer — Step 1: Layout Design (chip / field / scribe-line dimensions → die-grid layout cases)SMILE Lite Sampling Optimizer — Step 2: Key Selection (overlay-mark placement with model-wise NMU / PU trends)SMILE Lite Sampling Optimizer — Step 3: Optimization (cascade / random algorithms, contour map, top points, recommended model)SMILE Lite Sampling Optimizer — Step 4: Wafer Map (wafer radius, edge / die clearance, final wafermap)

Sampling Optimizer — Balance throughput and accuracy automatically

  • Run Layout Design → Key Selection → Optimization → Wafer Map sequentially inside one Workflow container
  • Cascade and random algorithms across OVO · OVO2 · OVO2EUV · OVO3 surface the optimal measurement set
  • The resulting sample set drops straight into the metrology recipe for HVM deployment
SMILE Lite Modeling — Recipe Editor assembling Inter-field · Intra-field · CPE stagesSMILE Lite Modeling — Coefficient assembly at the Model > Step > Coefficient levelSMILE Lite Modeling — Modeling Simulation validating against real data

Modeling — Multi-stage overlay correction

  • Decompose into Inter-field (wafer-coord) · Intra-field (shot-coord) · CPE (per-exposure residual) and correct only the systematic component
  • Recipe Editor composes Model > Step > Coefficient units; Modeling Simulation validates against real data
  • Extracted corrections feed back to the lithography alignment recipe, closing the correction loop

Other products

SMILE Pro

Compress analysis time with real-time detection and multimodal reasoning.

SMILE Pro+

Two autonomous modes accelerate the engineer's analysis workflow end-to-end.

Custom configuration

Compose and tune solutions to match your specific process

Tell us the challenge — we'll scope it with you.

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