Sampling Optimizer
Automating the trade-off between metrology throughput and model fidelity Optimizes coverage so the smallest sample set still recovers systematic patterns — the resulting set drops straight into the metrology tool's recipe.
What it does
- 01
Generate die-grid layout cases
Takes chip and field dimensions, enumerates feasible die-grid layout candidates, and ranks them by wafer utilization to narrow the field.
- 02
Place overlay keys, preview per-model trends
Places overlay measurement keys on the chosen layout in optimized or manual mode, with per-candidate model trends previewed alongside to feed the next step.
- 03
Model-driven optimization
Searches across multiple models to surface the highest-accuracy site set together with the recommended model.
- 04
Wafer-wide die and shot review
Spreads the finalized measurement points across the wafer to review die and shot layout. Wafer radius, edge clearance and die clearance close the recipe before it ships to metrology.
Available in
Tell us the challenge — we'll scope it with you.
You don't need detailed data ready. We reply within two business days with a tailored deployment scenario.
