Event
A model that understands the process, built for the domain.
- Wafer position and defect data compressed into a single vector — instant similar-case retrieval
- Pre-trained on Virtual Fab synthetic patterns — usable on day one without your data
- 3x RMSE improvement vs XGBoost · R² > 0.9 · 0.3 nm overlay prediction accuracy
Trusted investors and research partners.
Newsroom
Press and attention since year one
Starting from the hardest problems
A research team of process engineers and ML researchers, working together
Published papers.
Accepted at SPIE Advanced Lithography 2025·2026 and covered in industry press.
- Virtual metrology for improving overlay control capability in high-NA half-field exposureOct 23, 2026
- Proactive yield maximization in photolithography via human-in-the-loop AI on an on-premise big data platformApr 10, 2026
- Hybrid machine learning framework for systematic optimization of overlay key positionsApr 10, 2026
Patent portfolio.
Patents covering semiconductor process, metrology, and RCA.
10
United States 3 · Korea 7
As of October 28, 2026
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